ESP32-C6: Configure RISC-V compilation toolchain & Port ThreadX Kernel Boot

[alieissa-commits]

Description

Establish the isolated build infrastructure for the Espressif ESP32-C6-DevKitC-1-N8 board under the Espressif/ESP32-C6-DevKitC-1/ directory. Configure the RISC-V cross-compilation toolchain and integrate the ThreadX kernel assembly files with the ESP-IDF build system.

Tasks

• Create the vendor and board directory layout: Espressif/ESP32-C6-DevKitC-1/.
• Write a custom CMake toolchain file cmake/riscv-gcc-toolchain.cmake targeting the RV32IMAC architecture.
• Port the low-level ThreadX initialization assembly tx_initialize_low_level.S for RISC-V to handle the ESP32-C6's interrupt vector structures.
• Integrate Espressif's ESP-IDF CMake build wrapper idf.py with our localized CMakePresets framework.
• Implement a minimal startup test to verify successful kernel initialization and basic thread context-switching.