[dm][dma] Update DMA - #11678
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Extend DMA mapping to honor OFW dma-ranges even when no reserved memory pool is present, and add PCI host-bridge DMA-region translation for PCI devices. Prefer 32-bit-addressable allocations for translated devices, improve pool allocation fallbacks and synchronization, and establish a linear mapping for installed DMA pools when possible. Signed-off-by: GuEe-GUI <2991707448@qq.com>
Fix PL330 channel allocation so device-tree cells select peripheral request lines rather than execution channels. Generate proper peripheral DMA microcode using DMAWFP, DMALDP, DMASTP, and DMAFLUSHP, encode burst lengths correctly, honor transfer direction and non-secure attributes, and allocate microcode from DMA-coherent memory. Signed-off-by: GuEe-GUI <2991707448@qq.com>
📌 Code Review Assignment🏷️ Tag: componentsReviewers: @Maihuanyi Changed Files (Click to expand)
📊 Current Review Status (Last Updated: 2026-08-07 09:38 CST)
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Pull request overview
English: This PR updates RT-Thread’s DMA infrastructure, improving early DMA pool placement/extraction on AArch64, extending OFW/PCI DMA address translation behavior, and refining PL330 channel/microcode handling.
中文：本 PR 更新了 RT-Thread 的 DMA 基础设施，改进了 AArch64 早期 DMA 内存池的放置/提取逻辑，扩展了 OFW/PCI 的 DMA 地址转换行为，并完善了 PL330 通道分配与微码生成/执行流程。
Changes:
- Improve AArch64 early DMA pool placement (sub-4G preference, single-bank tail placement) / 改进 AArch64 早期 DMA pool 放置策略（优先 4G 以下、单内存段尾部放置）
- Extend DMA mapping to honor OFW
dma-rangesand add PCI host-bridge DMA translation ops / 扩展 DMA 映射以支持 OFWdma-ranges，并为 PCI 增加 host-bridge DMA 区域转换 - Update PL330 to allocate channels independently of DT request line IDs and generate peripheral-aware microcode / 更新 PL330：DT 参数选择外设请求线，控制器分配执行通道，并生成面向外设的微码
Reviewed changes
Copilot reviewed 6 out of 6 changed files in this pull request and generated 3 comments.
Show a summary per file
| File | Description |
|---|---|
| libcpu/aarch64/common/setup.c | Adjust early DMA pool reservation strategy (sub-4G preference, tail placement). |
| components/drivers/dma/dma-pl330.c | PL330 channel allocation + CCR/microcode generation updates; coherent microcode allocation. |
| components/drivers/dma/dma_pool.c | OFW/PCI DMA translation ops; pool linear mapping support; allocation behavior changes. |
| bsp/qemu-virt64-aarch64/README.md | Update AMP demo memory requirement from 258MB to 300MB. |
| bsp/qemu-virt64-aarch64/README_zh.md | 同步更新 AMP 示例内存需求为 300MB。 |
| bsp/qemu-virt64-aarch64/amp.dtsi | Update run-command comment to match new AMP memory requirement. |
Suppressed comments (2)
components/drivers/dma/dma_pool.c:216
- [bug/问题] ofw_dma_map_alloc() forces RT_DMA_F_32BITS unconditionally, which can cause allocations to fail on platforms where no suitable <4GB pool exists (even if the device could accept higher addresses).
English: Prefer 32-bit allocations, but fall back to the original flags when the 32-bit attempt fails (unless the caller explicitly requested RT_DMA_F_32BITS).
中文：当前无条件强制 RT_DMA_F_32BITS，可能导致低 4G 内存不足时分配失败。建议优先尝试 32-bit，但在失败时回退到原 flags（除非调用者显式要求 RT_DMA_F_32BITS）。
This issue also appears on line 485 of the same file.
static void *ofw_dma_map_alloc(struct rt_device *dev, rt_size_t size,
rt_ubase_t *dma_handle, rt_ubase_t flags)
{
void *cpu_addr;
flags |= RT_DMA_F_32BITS;
cpu_addr = dma_alloc(dev, size, dma_handle, flags);
if (cpu_addr && dma_handle)
{
*dma_handle = ofw_addr_cpu2dma(dev, *dma_handle);
}
components/drivers/dma/dma_pool.c:498
- [bug/问题] pci_dma_map_alloc() forces RT_DMA_F_32BITS unconditionally, which may fail on systems without enough sub-4GB memory even when the PCI DMA translation could work with higher CPU physical addresses.
English: Prefer 32-bit allocations, but retry without RT_DMA_F_32BITS if the first attempt fails (unless the caller explicitly requested RT_DMA_F_32BITS).
中文：当前无条件强制 RT_DMA_F_32BITS，可能在低 4G 内存不足时导致分配失败。建议优先尝试 32-bit，失败后回退到原 flags（除非调用者显式要求 RT_DMA_F_32BITS）。
static void *pci_dma_map_alloc(struct rt_device *dev, rt_size_t size,
rt_ubase_t *dma_handle, rt_ubase_t flags)
{
void *cpu_addr;
flags |= RT_DMA_F_32BITS;
cpu_addr = dma_alloc(dev, size, dma_handle, flags);
if (cpu_addr && dma_handle)
{
*dma_handle = pci_addr_cpu2dma(dev, *dma_handle);
}
return cpu_addr;
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| if (!conf->src_maxburst || conf->src_maxburst > 16 || | ||
| !conf->dst_maxburst || conf->dst_maxburst > 16) | ||
| { | ||
| return -RT_EINVAL; | ||
| } | ||
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| *ccr = (conf->src_maxburst - 1) << PL330_SRC_BURST_LEN_SHIFT; | ||
| *ccr |= (conf->dst_maxburst - 1) << PL330_DST_BURST_LEN_SHIFT; | ||
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| if (zone_end < platform_mem_region.end + pool_total) | ||
| { | ||
| LOG_E("No room for sub-4G DMA pool (%u bytes)", pool_total); |
| if (rt_aspace_map_phy(&rt_kernel_space, &hint, MMU_MAP_K_RWCB, | ||
| start >> MM_PAGE_SHIFT, &va)) | ||
| { | ||
| LOG_E("map %s [%p, %p] failed", region->name, start, end); |
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