rustc_target/asm: add LoongArch LSX/LASX inline asm register support#158364
rustc_target/asm: add LoongArch LSX/LASX inline asm register support#158364heiher wants to merge 3 commits into
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This looks fine to me but I'm not sure whether we typically need T-lang to sign off on extensions to stable inline asm. @Amanieu do you know if this needs a T-lang FCP? |
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AFAIK, a common way to add support for new registers in architectures where inline assembly is stable is to use asm_experimental_reg (#133416). |
Thanks for pointing that out. I think gating new inline assembly register support behind |
Add support for LoongArch LSX and LASX registers in inline assembly by introducing the `vreg` and `xreg` register classes, along with their associated vector types and operand modifiers. The new register classes are gated behind the `asm_experimental_reg` feature. Also model the overlap between FPU, LSX, and LASX registers so register conflict checking works correctly for aliased registers.
Add UI tests for LoongArch LSX/LASX inline asm registers, including target-feature gating and overlap diagnostics between `fN`, `vrN`, and `xrN` registers.
Add assembly tests for LoongArch inline asm register modifiers. Verify that the `w` and `u` modifiers correctly select LSX and LASX register views for `freg`, `vreg`, and `xreg` operands and produce the expected register names in the generated assembly.
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This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed. Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers. |
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| lsx: F16, F32, F64, | ||
| VecI8(16), VecI16(8), VecI32(4), VecI64(2), VecF32(4), VecF64(2); |
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lsx supports 128-bit integer arithmetic (e.g., __lsx_vadd_q), so it may be possible to add support for passing i128. Similar support is already available for s390x (stable) and x86 (unstable), and it is believed to be possible for aarch64 and powerpc64 as well (see implementation history list in #133416 for more.)
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Thanks! i128 vector types are not yet legalized in the LLVM LoongArch backend. There is an ongoing PR to add support, and I'll enable this once it lands.
rustc_target/asm: add LoongArch LSX/LASX inline asm register support Add support for LoongArch LSX and LASX registers in inline assembly by introducing the `vreg` and `xreg` register classes, along with their associated vector types and operand modifiers. The new register classes are gated behind the `asm_experimental_reg` feature. Also model the overlap between FPU, LSX, and LASX registers so register conflict checking works correctly for aliased registers.
…uwer Rollup of 6 pull requests Successful merges: - #156737 (Implement `DoubleEndedIterator::next_chunk_back`) - #158147 (std: fix stack buffer overflow in Windows junction_point) - #158180 (std: use `OnceLock` for SGX environment variable storage) - #158427 (Implement `ptr::{read,write}_unaligned` via `repr(packed)`) - #158531 (Change `adjust_ident_and_get_scope` arg to `LocalDefId`) - #158364 (rustc_target/asm: add LoongArch LSX/LASX inline asm register support)
rustc_target/asm: add LoongArch LSX/LASX inline asm register support Add support for LoongArch LSX and LASX registers in inline assembly by introducing the `vreg` and `xreg` register classes, along with their associated vector types and operand modifiers. The new register classes are gated behind the `asm_experimental_reg` feature. Also model the overlap between FPU, LSX, and LASX registers so register conflict checking works correctly for aliased registers.
Rollup of 8 pull requests Successful merges: - #156737 (Implement `DoubleEndedIterator::next_chunk_back`) - #158180 (std: use `OnceLock` for SGX environment variable storage) - #158427 (Implement `ptr::{read,write}_unaligned` via `repr(packed)`) - #158531 (Change `adjust_ident_and_get_scope` arg to `LocalDefId`) - #158574 (Clarify ExitStatusExt documentation) - #158334 (rustdoc: Show use-site paths for unevaluated const array lengths) - #158364 (rustc_target/asm: add LoongArch LSX/LASX inline asm register support) - #158667 (rustc_sanitizers: use twox-hash without default features)
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Add support for LoongArch LSX and LASX registers in inline assembly by introducing the
vregandxregregister classes, along with their associated vector types and operand modifiers. The new register classes are gated behind theasm_experimental_regfeature. Also model the overlap between FPU, LSX, and LASX registers so register conflict checking works correctly for aliased registers.