x86 avx512: add mask compress and compressstore functions for 128bit #1356
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Collaborator
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Hello @AdrianRiedl and thank you for this PR! I'll fix the CI issues, they appear unrelated. From a brief glance everything looks okay. Did you generate the test vectors on real AVX512VL hardware or use an emulator? |
Author
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Hi @mr-c, thanks for taking a look — and especially for dealing with the CI issues. The test vectors were generated on real AVX512VL hardware (AMD Ryzen 9 7950X 16-Core Processor). |
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This pull request adds support for AVX-512 compress and compress-store intrinsics for 128-bit vectors. It introduces portable implementations for these intrinsics for double, float, int32, and int64 types, along with their corresponding mask and zero-masked variants, and sets up native aliasing macros for seamless integration with existing code.
Code style is kept similar to the already existing implementations for m256/512.