Initial support for STM32H743/H745 CPUs

src/device/arm/mpu.go

@@ -0,0 +1,143 @@
+//go:build cortexm
+
+package arm
+
+import (
+	"runtime/volatile"
+	"unsafe"
+)
+
+/*
+The struct below has been created using gen-device-svd
+on cortex_m/armv7em.yaml from stm32-rs.
+The MPU type has been included as some stm32 svd files
+do not contain MPU definitions.
+*/
+
+const MPU_BASE = SCS_BASE + 0x0D90
+
+// Memory Protection Unit
+type MPU_Type struct {
+	TYPE    volatile.Register32 // 0x0
+	CTRL    volatile.Register32 // 0x4
+	RNR     volatile.Register32 // 0x8
+	RBAR    volatile.Register32 // 0xC
+	RASR    volatile.Register32 // 0x10
+	RBAR_A1 volatile.Register32 // 0x14
+	RASR_A1 volatile.Register32 // 0x18
+	RBAR_A2 volatile.Register32 // 0x1C
+	RASR_A2 volatile.Register32 // 0x20
+	RBAR_A3 volatile.Register32 // 0x24
+	RASR_A3 volatile.Register32 // 0x28
+}
+
+var MPU = (*MPU_Type)(unsafe.Pointer(uintptr(MPU_BASE)))
+
+// Constants for MPU: Memory protection unit
+const (
+	// TYPER: MPU type register
+	// Position of SEPARATE field.
+	MPU_TYPER_SEPARATE_Pos = 0x0
+	// Bit mask of SEPARATE field.
+	MPU_TYPER_SEPARATE_Msk = 0x1
+	// Bit SEPARATE.
+	MPU_TYPER_SEPARATE = 0x1
+	// Position of DREGION field.
+	MPU_TYPER_DREGION_Pos = 0x8
+	// Bit mask of DREGION field.
+	MPU_TYPER_DREGION_Msk = 0xff00
+	// Position of IREGION field.
+	MPU_TYPER_IREGION_Pos = 0x10
+	// Bit mask of IREGION field.
+	MPU_TYPER_IREGION_Msk = 0xff0000
+
+	// CTRL: MPU control register
+	// Position of ENABLE field.
+	MPU_CTRL_ENABLE_Pos = 0x0
+	// Bit mask of ENABLE field.
+	MPU_CTRL_ENABLE_Msk = 0x1
+	// Bit ENABLE.
+	MPU_CTRL_ENABLE = 0x1
+	// Position of HFNMIENA field.
+	MPU_CTRL_HFNMIENA_Pos = 0x1
+	// Bit mask of HFNMIENA field.
+	MPU_CTRL_HFNMIENA_Msk = 0x2
+	// Bit HFNMIENA.
+	MPU_CTRL_HFNMIENA = 0x2
+	// Position of PRIVDEFENA field.
+	MPU_CTRL_PRIVDEFENA_Pos = 0x2
+	// Bit mask of PRIVDEFENA field.
+	MPU_CTRL_PRIVDEFENA_Msk = 0x4
+	// Bit PRIVDEFENA.
+	MPU_CTRL_PRIVDEFENA = 0x4
+
+	// RNR: MPU region number register
+	// Position of REGION field.
+	MPU_RNR_REGION_Pos = 0x0
+	// Bit mask of REGION field.
+	MPU_RNR_REGION_Msk = 0xff
+
+	// RBAR: MPU region base address register
+	// Position of REGION field.
+	MPU_RBAR_REGION_Pos = 0x0
+	// Bit mask of REGION field.
+	MPU_RBAR_REGION_Msk = 0xf
+	// Position of VALID field.
+	MPU_RBAR_VALID_Pos = 0x4
+	// Bit mask of VALID field.
+	MPU_RBAR_VALID_Msk = 0x10
+	// Bit VALID.
+	MPU_RBAR_VALID = 0x10
+	// Position of ADDR field.
+	MPU_RBAR_ADDR_Pos = 0x5
+	// Bit mask of ADDR field.
+	MPU_RBAR_ADDR_Msk = 0xffffffe0
+
+	// RASR: MPU region attribute and size register
+	// Position of ENABLE field.
+	MPU_RASR_ENABLE_Pos = 0x0
+	// Bit mask of ENABLE field.
+	MPU_RASR_ENABLE_Msk = 0x1
+	// Bit ENABLE.
+	MPU_RASR_ENABLE = 0x1
+	// Position of SIZE field.
+	MPU_RASR_SIZE_Pos = 0x1
+	// Bit mask of SIZE field.
+	MPU_RASR_SIZE_Msk = 0x3e
+	// Position of SRD field.
+	MPU_RASR_SRD_Pos = 0x8
+	// Bit mask of SRD field.
+	MPU_RASR_SRD_Msk = 0xff00
+	// Position of B field.
+	MPU_RASR_B_Pos = 0x10
+	// Bit mask of B field.
+	MPU_RASR_B_Msk = 0x10000
+	// Bit B.
+	MPU_RASR_B = 0x10000
+	// Position of C field.
+	MPU_RASR_C_Pos = 0x11
+	// Bit mask of C field.
+	MPU_RASR_C_Msk = 0x20000
+	// Bit C.
+	MPU_RASR_C = 0x20000
+	// Position of S field.
+	MPU_RASR_S_Pos = 0x12
+	// Bit mask of S field.
+	MPU_RASR_S_Msk = 0x40000
+	// Bit S.
+	MPU_RASR_S = 0x40000
+	// Position of TEX field.
+	MPU_RASR_TEX_Pos = 0x13
+	// Bit mask of TEX field.
+	MPU_RASR_TEX_Msk = 0x380000
+	// Position of AP field.
+	MPU_RASR_AP_Pos = 0x18
+	// Bit mask of AP field.
+	MPU_RASR_AP_Msk = 0x7000000
+	// Position of XN field.
+	MPU_RASR_XN_Pos = 0x1c
+	// Bit mask of XN field.
+	MPU_RASR_XN_Msk = 0x10000000
+	// Bit XN.
+	MPU_RASR_XN = 0x10000000
+)

src/examples/pwm/nucleo-h753zi.go

@@ -0,0 +1,11 @@
+//go:build stm32h7
+
+package main
+
+import "machine"
+
+var (
+	pwm  = &machine.TIM1
+	pinA = machine.PA8
+	pinB = machine.PA9
+)

src/examples/wwdg/main.go

@@ -0,0 +1,31 @@
+package main
+
+import (
+	"machine"
+	"time"
+)
+
+func main() {
+	time.Sleep(2 * time.Second)
+
+	println("configuring window watchdog")
+	config := machine.WindowWatchdogConfig{
+		TimeoutMicros: 100000, // 100ms
+		WindowPercent: 50,     // 50ms to 100ms refresh window
+	}
+
+	machine.WindowWatchdog.Configure(config)
+	machine.WindowWatchdog.Start()
+
+	println("updating wwdg for 1 second")
+	for i := 0; i < 10; i++ {
+		time.Sleep(75 * time.Millisecond) // middle of the window
+		machine.WindowWatchdog.Update()
+		println("alive")
+	}
+
+	println("entering tight loop (will reset)")
+	for {
+		time.Sleep(10 * time.Millisecond)
+	}
+}

src/machine/board_nucleoh753zi.go

@@ -0,0 +1,105 @@
+//go:build nucleoh753zi
+
+package machine
+
+import (
+	"device/stm32"
+	"runtime/interrupt"
+)
+
+const xtalHz = 8_000_000
+const hseBypass = true
+
+const (
+	// Arduino Pins
+	A0 = PA3
+	A1 = PC0
+	A2 = PC3
+	A3 = PB1
+	A4 = PC2
+	A5 = PF10
+
+	D0  = PG9
+	D1  = PG14
+	D2  = PF15
+	D3  = PE13
+	D4  = PF14
+	D5  = PE11
+	D6  = PE9
+	D7  = PF13
+	D8  = PF12
+	D9  = PD15
+	D10 = PD14
+	D11 = PA7
+	D12 = PA6
+	D13 = PA5
+	D14 = PB9
+	D15 = PB8
+)
+
+const (
+	LED         = LED_BUILTIN
+	LED_BUILTIN = LED_GREEN
+	LED_GREEN   = PB0
+	LED_YELLOW  = PE1
+	LED_RED     = PB14
+)
+
+const (
+	BUTTON      = BUTTON_USER
+	BUTTON_USER = PC13
+)
+
+// UART pins
+const (
+	// PD8 and PD9 are connected to the ST-Link Virtual Com Port (VCP)
+	UART_TX_PIN = PD8
+	UART_RX_PIN = PD9
+	UART_ALT_FN = AF7_SPI2_3_USART1_2_3_UART5_SPDIFRX
+)
+
+var (
+	// USART3 is the hardware serial port connected to the onboard ST-LINK
+	// debugger to be exposed as virtual COM port over USB on Nucleo boards.
+	UART1  = &_UART1
+	_UART1 = UART{
+		Buffer:            NewRingBuffer(),
+		Bus:               stm32.USART3,
+		TxAltFuncSelector: UART_ALT_FN,
+		RxAltFuncSelector: UART_ALT_FN,
+	}
+	DefaultUART = UART1
+)
+
+func init() {
+	UART1.Interrupt = interrupt.New(stm32.IRQ_USART3, _UART1.handleInterrupt)
+}
+
+// SPI pins
+const (
+	SPI0_SCK_PIN = PA5
+	SPI0_SDI_PIN = PA6
+	SPI0_SDO_PIN = PA7
+)
+
+var (
+	SPI1 = &SPI{
+		Bus:             stm32.SPI1,
+		AltFuncSelector: AF5_SPI1_2_3_4_5_6_I2S,
+	}
+	SPI0 = SPI1
+)
+
+// I2C pins
+const (
+	I2C0_SCL_PIN = PB8
+	I2C0_SDA_PIN = PB9
+)
+
+var (
+	I2C1 = &I2C{
+		Bus:             stm32.I2C1,
+		AltFuncSelector: AF4_I2C1_2_3_4_USART1,
+	}
+	I2C0 = I2C1
+)

src/machine/machine_stm32.go

@@ -86,12 +86,6 @@ func (p Pin) PortMaskClear() (*uint32, uint32) {
 	return &port.BSRR.Reg, 1 << (pin + 16)
 }
 
-// EnterBootloader resets the chip into the bootloader.
-// This is currently a stub for STM32, required to satisfy machine.EnterBootloader
-// called by machine/usb/cdc.
-func EnterBootloader() {
-}
-
 var deviceID [12]byte
 
 // DeviceID returns an identifier that is unique within