Detect MTP routed-expert layout separately (dense NVFP4 vs MTP MXFP4)

[d3nb]

Builds on your construction-time resolution (3972f5e) to close the MTP half of NVIDIA#16196.

What this adds

_set_deepseek_v4_routed_moe_quant_config detects a single routed-expert layout from layers.0.ffn.experts.0.w1.weight and applies it to every MoE layer, including the MTP layer. But in the ModelOpt experts-only NVFP4 repacks the two regions differ:

• dense routed experts layers.0..N.ffn.experts → dtype U8 = NVFP4 (re-quantized);
• MTP routed experts mtp.0.ffn.experts → dtype I8 = MXFP4 (left at the base model precision).

So the MTP experts were getting the dense NVFP4 config and dying in fused_moe/quantization.py load_quant_scales. This change detects the MTP expert dtype separately (mtp.0.ffn.experts.0.w1.weight) and assigns the MTP layer indices the correct W4A8_MXFP4_* config; dense layers are unchanged.

Validation (real weights + B300)

Ran on the real nvidia/DeepSeek-V4-Pro-NVFP4 (851 GB, 64 shards), 4× B300, TP4, moe_backend=TRTLLM, with your construction fix applied (I validated the equivalent construction change on the 1.3.0rc15.post1 wheel, since that's what loads deepseek_v4 configs for us; _set_deepseek_v4_routed_moe_quant_config is essentially identical on main):

• no MTP: loads 100% → Application startup complete → generates correctly;
• MTP=1 (checkpoint-native num_nextn_predict_layers): MTP routed experts layout=mxfp4 / dense NVFP4, serves + generates;
• MTP=3 (NVIDIA's B300 config): serves + generates. Note mtp_eagle_one_model builds a single shared MTP layer regardless of num_nextn_predict_layers, so covering the checkpoint's MTP layer count is sufficient — no per-duplicated-layer handling needed.
• MTP runtime is real: accept_len ≈ 2.86 (output tokens / decode steps, MTP=3).

Happy to adjust naming/placement to your taste, and to re-run any revision against the real weights + B300. Ref NVIDIA#16196.

[waynehacking8]

Reviewed against main: _get_safetensors_header_for_tensor and the surrounding function are identical there, the mtp_layout==layout and missing-tensor fallbacks look right, and group_size 32 for MXFP4 matches get_mxfp4_quant_algo's expectations -- happy to take this as-is into the branch, and the upstream PR is already open (NVIDIA#16276, currently scoped to the two validated halves; I'll fold this in and bring MTP into scope once merged here). Two mechanical things the upstream repo enforces before I can merge it: each commit needs your DCO Signed-off-by (git commit --amend -s), and their contribution guidelines disallow AI co-author trailers in commit messages, so the Co-Authored-By line needs to go. If you push the amended commit I'll merge and update NVIDIA#16276 the same hour.

[d3nb]

Amended: dropped the AI co-author trailer and added my DCO Signed-off-by (force-pushed, now 5442601). Ready to merge — thanks for folding it into NVIDIA#16276.

[waynehacking8]

Merged and pushed — NVIDIA#16276 now carries your commit with authorship intact, and I've updated its body to bring MTP into scope. Thanks for the quick amend and the B300 validation.