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SP ARMv3 assembly: fix for Montogmery Multiply #11274

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Merged
philljj merged 1 commit into from
Aug 26, 2026
+52 −53
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SP ARMv3 assembly: fix for Montogmery Multiply #11274

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105 changes: 52 additions & 53 deletions wolfcrypt/src/sp_arm32.c
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Original file line number Diff line number Diff line change
Expand Up @@ -10003,27 +10003,27 @@ WC_OMIT_FRAME_POINTER static SP_NOINLINE void sp_2048_mont_reduce_32(
#endif
"ldr r10, [%[a], #124]\n\t"
"lsl r6, r8, #16\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"lsr r7, r7, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r5, r5, r7\n\t"
"adcs r4, r4, #0\n\t"
"adcs r4, r3, #0\n\t"
"mov r3, #0\n\t"
"adc r3, r3, r3\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"mul r6, r7, r6\n\t"
"lsr r7, r6, #16\n\t"
"lsl r6, r6, #16\n\t"
"adds r5, r5, r6\n\t"
"adcs r4, r4, r7\n\t"
"adc r3, r3, #0\n\t"
"mov r6, r8\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r4, r4, r7\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"adc r3, r3, #0\n\t"
"lsr r7, r7, #16\n\t"
"mul r6, r7, r6\n\t"
Expand Down Expand Up @@ -15086,27 +15086,27 @@ WC_OMIT_FRAME_POINTER static SP_NOINLINE void sp_2048_mont_reduce_64(
#endif
"ldr r10, [%[a], #252]\n\t"
"lsl r6, r8, #16\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"lsr r7, r7, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r5, r5, r7\n\t"
"adcs r4, r4, #0\n\t"
"adcs r4, r3, #0\n\t"
"mov r3, #0\n\t"
"adc r3, r3, r3\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"mul r6, r7, r6\n\t"
"lsr r7, r6, #16\n\t"
"lsl r6, r6, #16\n\t"
"adds r5, r5, r6\n\t"
"adcs r4, r4, r7\n\t"
"adc r3, r3, #0\n\t"
"mov r6, r8\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r4, r4, r7\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"adc r3, r3, #0\n\t"
"lsr r7, r7, #16\n\t"
"mul r6, r7, r6\n\t"
Expand Down Expand Up @@ -35240,27 +35240,27 @@ WC_OMIT_FRAME_POINTER static SP_NOINLINE void sp_3072_mont_reduce_48(
#endif
"ldr r10, [%[a], #188]\n\t"
"lsl r6, r8, #16\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"lsr r7, r7, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r5, r5, r7\n\t"
"adcs r4, r4, #0\n\t"
"adcs r4, r3, #0\n\t"
"mov r3, #0\n\t"
"adc r3, r3, r3\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"mul r6, r7, r6\n\t"
"lsr r7, r6, #16\n\t"
"lsl r6, r6, #16\n\t"
"adds r5, r5, r6\n\t"
"adcs r4, r4, r7\n\t"
"adc r3, r3, #0\n\t"
"mov r6, r8\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r4, r4, r7\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"adc r3, r3, #0\n\t"
"lsr r7, r7, #16\n\t"
"mul r6, r7, r6\n\t"
Expand Down Expand Up @@ -42259,27 +42259,27 @@ WC_OMIT_FRAME_POINTER static SP_NOINLINE void sp_3072_mont_reduce_96(
#endif
"ldr r10, [%[a], #380]\n\t"
"lsl r6, r8, #16\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"lsr r7, r7, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r5, r5, r7\n\t"
"adcs r4, r4, #0\n\t"
"adcs r4, r3, #0\n\t"
"mov r3, #0\n\t"
"adc r3, r3, r3\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"mul r6, r7, r6\n\t"
"lsr r7, r6, #16\n\t"
"lsl r6, r6, #16\n\t"
"adds r5, r5, r6\n\t"
"adcs r4, r4, r7\n\t"
"adc r3, r3, #0\n\t"
"mov r6, r8\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r4, r4, r7\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"adc r3, r3, #0\n\t"
"lsr r7, r7, #16\n\t"
"mul r6, r7, r6\n\t"
Expand Down Expand Up @@ -57204,27 +57204,27 @@ WC_OMIT_FRAME_POINTER static SP_NOINLINE void sp_4096_mont_reduce_128(
#endif
"ldr r10, [%[a], #508]\n\t"
"lsl r6, r8, #16\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"lsr r7, r7, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r5, r5, r7\n\t"
"adcs r4, r4, #0\n\t"
"adcs r4, r3, #0\n\t"
"mov r3, #0\n\t"
"adc r3, r3, r3\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"mul r6, r7, r6\n\t"
"lsr r7, r6, #16\n\t"
"lsl r6, r6, #16\n\t"
"adds r5, r5, r6\n\t"
"adcs r4, r4, r7\n\t"
"adc r3, r3, #0\n\t"
"mov r6, r8\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r4, r4, r7\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"adc r3, r3, #0\n\t"
"lsr r7, r7, #16\n\t"
"mul r6, r7, r6\n\t"
Expand Down Expand Up @@ -70665,7 +70665,7 @@ WC_OMIT_FRAME_POINTER static SP_NOINLINE void sp_256_mont_mul_8(sp_digit* r,
: [r] "r" (r), [a] "r" (a), [b] "r" (b)
#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
: "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "lr",
"r12"
"r12", "r11"
);
#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
(void)m_p;
Expand Down Expand Up @@ -71480,7 +71480,6 @@ WC_OMIT_FRAME_POINTER static SP_NOINLINE void sp_256_mont_sqr_8(sp_digit* r,
#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */

__asm__ __volatile__ (
"sub sp, sp, #0x44\n\t"
"sub sp, sp, #0x44\n\t"
"mov r5, #0\n\t"
/* A[0] * A[1] */
Expand Down Expand Up @@ -72663,7 +72662,7 @@ WC_OMIT_FRAME_POINTER static SP_NOINLINE void sp_256_mont_sqr_8(sp_digit* r,
: [r] "r" (r), [a] "r" (a)
#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
: "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r12", "r8", "r9",
"r10", "lr"
"r10", "lr", "r11"
);
#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
(void)m_p;
Expand Down Expand Up @@ -73946,27 +73945,27 @@ WC_OMIT_FRAME_POINTER static SP_NOINLINE void sp_256_mont_reduce_8(sp_digit* a,
#endif
"ldr r10, [%[a], #28]\n\t"
"lsl r6, r8, #16\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"lsr r7, r7, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r5, r5, r7\n\t"
"adcs r4, r4, #0\n\t"
"adcs r4, r3, #0\n\t"
"mov r3, #0\n\t"
"adc r3, r3, r3\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"mul r6, r7, r6\n\t"
"lsr r7, r6, #16\n\t"
"lsl r6, r6, #16\n\t"
"adds r5, r5, r6\n\t"
"adcs r4, r4, r7\n\t"
"adc r3, r3, #0\n\t"
"mov r6, r8\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r4, r4, r7\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"adc r3, r3, #0\n\t"
"lsr r7, r7, #16\n\t"
"mul r6, r7, r6\n\t"
Expand Down Expand Up @@ -74638,27 +74637,27 @@ WC_OMIT_FRAME_POINTER static SP_NOINLINE void sp_256_mont_reduce_order_8(
#endif
"ldr r10, [%[a], #28]\n\t"
"lsl r6, r8, #16\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"lsr r7, r7, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r5, r5, r7\n\t"
"adcs r4, r4, #0\n\t"
"adcs r4, r3, #0\n\t"
"mov r3, #0\n\t"
"adc r3, r3, r3\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"mul r6, r7, r6\n\t"
"lsr r7, r6, #16\n\t"
"lsl r6, r6, #16\n\t"
"adds r5, r5, r6\n\t"
"adcs r4, r4, r7\n\t"
"adc r3, r3, #0\n\t"
"mov r6, r8\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r4, r4, r7\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"adc r3, r3, #0\n\t"
"lsr r7, r7, #16\n\t"
"mul r6, r7, r6\n\t"
Expand Down Expand Up @@ -92181,27 +92180,27 @@ WC_OMIT_FRAME_POINTER static SP_NOINLINE void sp_384_mont_reduce_12(sp_digit* a,
#endif
"ldr r10, [%[a], #44]\n\t"
"lsl r6, r8, #16\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"lsr r7, r7, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r5, r5, r7\n\t"
"adcs r4, r4, #0\n\t"
"adcs r4, r3, #0\n\t"
"mov r3, #0\n\t"
"adc r3, r3, r3\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"mul r6, r7, r6\n\t"
"lsr r7, r6, #16\n\t"
"lsl r6, r6, #16\n\t"
"adds r5, r5, r6\n\t"
"adcs r4, r4, r7\n\t"
"adc r3, r3, #0\n\t"
"mov r6, r8\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r4, r4, r7\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"adc r3, r3, #0\n\t"
"lsr r7, r7, #16\n\t"
"mul r6, r7, r6\n\t"
Expand Down Expand Up @@ -119379,27 +119378,27 @@ WC_OMIT_FRAME_POINTER static SP_NOINLINE void sp_521_mont_reduce_order_17(
#endif
"ldr r10, [%[a], #64]\n\t"
"lsl r6, r8, #16\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"lsr r7, r7, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r4, r4, r7\n\t"
"adcs r5, r5, #0\n\t"
"adcs r5, r3, #0\n\t"
"mov r3, #0\n\t"
"adc r3, r3, r3\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"mul r6, r7, r6\n\t"
"lsr r7, r6, #16\n\t"
"lsl r6, r6, #16\n\t"
"adds r4, r4, r6\n\t"
"adcs r5, r5, r7\n\t"
"adc r3, r3, #0\n\t"
"mov r6, r8\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r5, r5, r7\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"adc r3, r3, #0\n\t"
"lsr r7, r7, #16\n\t"
"mul r6, r7, r6\n\t"
Expand Down Expand Up @@ -149317,27 +149316,27 @@ WC_OMIT_FRAME_POINTER static SP_NOINLINE void sp_1024_mont_reduce_32(
#endif
"ldr r10, [%[a], #124]\n\t"
"lsl r6, r8, #16\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"lsr r7, r7, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r5, r5, r7\n\t"
"adcs r4, r4, #0\n\t"
"adcs r4, r3, #0\n\t"
"mov r3, #0\n\t"
"adc r3, r3, r3\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"mul r6, r7, r6\n\t"
"lsr r7, r6, #16\n\t"
"lsl r6, r6, #16\n\t"
"adds r5, r5, r6\n\t"
"adcs r4, r4, r7\n\t"
"adc r3, r3, #0\n\t"
"mov r6, r8\n\t"
"lsr r7, r7, #16\n\t"
"lsr r7, r11, #16\n\t"
"lsr r6, r6, #16\n\t"
"mul r7, r6, r7\n\t"
"adds r4, r4, r7\n\t"
"lsl r7, r7, #16\n\t"
"lsl r7, r11, #16\n\t"
"adc r3, r3, #0\n\t"
"lsr r7, r7, #16\n\t"
"mul r6, r7, r6\n\t"
Expand Down
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